1. Field
This invention relates generally to reset circuits, and more specifically to a reset circuit that can be used during a low voltage test of a circuit within an integrated circuit package.
2. Related Art
A packaged integrated circuit comprises at least one die that is typically encapsulated in ceramic, plastic insulation, or resin, which constitute packaging. One or more circuits are integrated onto the die. For a normally encapsulated die, the only coupling of signals between the circuits on the die and locations outside the packaging is with metal pins through the packaging. However, there are signals that exist within the packaging that do not appear at a metal pin. Therefore, for a typically packaged integrated circuit, a signal that only exists within the packaging cannot be readily accessed.
After packaging of the die, a circuit on the die may need to be tested to determine whether it is still operating properly at a voltage lower than a nominal power supply voltage. This is called low voltage testing which is used to ensure that a circuit meets speed and timing requirements, in contrast to high voltage testing which is used to stress gate oxides. This is also called after-package, or package-level, testing in which the only accessible test points are the metal pins through the packaging, in contrast to chip-probing, or wafer-level testing, in which additional locations on the die are accessible as test points.
A digital circuit cannot be relied upon to operate predictably when the voltage of its power supply goes below a certain level, a reset threshold voltage. Therefore, a low voltage detection circuit is used to monitor the power supply and to force the digital circuit into reset before the voltage of the power supply voltage goes too low. A low voltage detection circuit that resets another circuit is called a reset circuit or a power-on reset (POR) circuit. When the power supply voltage is below the reset threshold voltage, the reset circuit outputs a RESET signal that that forces the digital circuit into reset, which includes turning off the digital circuit. It is important that the digital circuit still be operating properly when it is reset. After-package, or package-level, testing includes testing whether the digital circuit is operating properly when it is reset.
One way to ensure that a digital circuit is operating properly at the reset threshold voltage is to determine that it operates properly at a voltage below the reset threshold voltage. In order to test that a digital circuit operates properly at a voltage below the reset threshold voltage, it is necessary to first reduce the power supply voltage for the digital circuit under test to a voltage below the reset threshold voltage. A digital circuit under test is coupled to a reset circuit, and, typically, both are located within a same integrated circuit package, usually on a same die. However, known reset circuits output the RESET signal and turn off the digital circuit under test before the power supply voltage reaches any voltage below the reset threshold voltage, thereby preventing execution of the low voltage test.
A first known method of overcoming the above-described, and of determining whether a digital circuit is operating properly at the reset threshold voltage is to override the RESET signal outputting by the known reset circuit, and then to lower the voltage of the power supply for the digital circuit (“to override” the RESET signal means to force it to not change state). Next, a determination is made whether the digital circuit is still operating properly at the lower power supply voltage. The first known method is relatively easy to accomplish only if the RESET signal is readily accessible, such as appearing at a pin of an integrated circuit package in which the digital circuit and the reset circuit reside.
A second known method of overcoming the above-described, and of determining whether a digital circuit is operating properly at the reset voltage is to design an integrated circuit having a test mode, which, when entered into, inhibits generation of the RESET signal. As with the first known method, with the second known method, the integrated circuit that has the test mode also includes both the digital circuit under test and the reset circuit. Typically, such an integrated circuit communicates with a microprocessor via a communications port. As result of programming, the microprocessor signals the integrated circuit to enter the test mode. Disadvantageously, it is possible for the integrated circuit to inadvertently enter into the test mode, and if the test mode has been inadvertently entered, it is not easy to determine that the integrated circuit has exited from the test mode.